• EU (Execution of machine instructions by the processor)
• CU (Managing the execution of machine instructions of the processor)
• FPU (Hardware acceleration of floating point computations)
• ALU (Performs arithmetic and logical operations)
• ZISC (Hardware nearest match search)
• OISC (Performing computations through a single universal instruction)
• MISC (Executing commands through a single universal instruction code)
• VLIW (Parallel execution of commands without a hardware scheduler)
• RISC (Accelerated execution of simple commands by the processor)
• CISC (Executing complex operations with a single instruction)
• EPIC (Division of responsibility for execution parallelism)
• GEMM (Matrix multiplication using the row times column method)
• Inner Product (Weighted sum of pairwise coordinate products)
• Itanium (Explicit static scheduling of parallel instructions)
• UltraSPARC (64-bit RISC microprocessor architecture with out-of-order execution)
• SPARC (Open standard RISC architecture)
• POWER10 (Multithreaded scaling with hardware AI acceleration)
• PowerPC (RISC architecture with computation optimization)
• MIPS64 (64-bit RISC architecture with fixed instruction length)
• MIPS32 (32-bit RISC architecture with fixed instruction length)
• MIPS (Simplified pipelined RISC architecture without interlocks)
• Dot Product (Summing products of two vectors)
• Transpose (Matrix row and column transposition)
• Shape (Returns the dimensions of a tensor)
• Rank (Number of dimensions (Axes) of a Tensor)
• Tensor (Multidimensional container for numerical data)
• Matrix (Storing data in tabular form)
• Vector (Ordered storage of numbers in continuous memory)
• Scalar (Converting a multidimensional tensor into a single number)
• RISC-V (Open modular instruction set architecture)
• Thumb-2 (Hybrid 32 and 16-bit instruction set)
• Thumb (Compressing 32-bit ARM instructions to 16-bit)
• AArch64 (64-bit processor architecture with fixed instruction length)
• ARM (Energy efficient execution of processor instructions)
• IA-64 (Architecture of explicitly parallel instruction computing EPIC)
• IA-32 (Provides execution of 32-bit computations)
• x64 (Extension of the 32-bit x86 architecture to 64 bits)
• x86 (Execution of instructions based on CISC architecture)
• DDP (Combining Two Dies into a Single Package)
• TDMR (Magnetic recording with sector correction)
• EAMR (Local heating for stable recording)
• HAMR (Local laser heating for magnetic recording)
• PMR (Perpendicular data recording on disk)
• CMR (Longitudinal data recording on magnetic media)
• SMR (Overlapping track recording for increased density)
• PPR (Layered restoration of defective cells after assembly)
• CAS (Memory column access delay)
• EXPO (Automatic app of factory RAM overclocking profiles)
• XMP (Automated factory overclocking of RAM)
• ODT (Dynamic On-Chip ompedance matching)
• LRDIMM (Buffering memory signals with load reduction)
• UDIMM (Unbuffered memory module with direct access)
• RDIMM (Buffering of commands and memory addresses)
• Chipkill (Correction of Failures of an Entire DRAM module)
• ECC (Memory Error Detection and Correction)
• EXT4 (Journaling file system for Linux)
• UDF (File system for optical media)
• exFAT (File system for flash drives without FAT32 limitations)
• eSRAM (Embedded static random access memory)
• eDRAM (Embedded dynamic random access memory)
• RLDRAM (Low latency memory with eight banks)
• NTFS (File system with journaling and access control)
• 3D XPoint (Byte-addressable non-volatile memory)
• LPDDR (Low power memory)
• DDR5 (High-speed energy-efficient computer RAM)
• QDR SRAM (Memory with double data transfer rate)
• FeRAM (Ferroelectric capacitor-based Non-Volatile memory)
• DDR4 (High-speed synchronous data transfer)
• PVSCSI (Paravirtual VMware storage driver)
• VMXNET3 (Paravirtualized network adapter with hardware offloading)
• VMware Tools (Integration of Guest OS with Hypervisor)
• SVM (Full hardware isolation of virtual machines)
• VMLAUNCH (Launching a guest virtual machine)
• VMRESUME (Resuming a suspended virtual machine)
• AMD-Vi (Hardware I/O virtualization)
• AMD-V (Hardware virtualization using the processor)
• Intel VT-d (Hardware isolation of direct device access)
• VMExit (Hypervisor interception of VM control)
• VMEnter (CPU transition instruction to Guest)
• Intel VT-x (Hardware Virtualization of the CPU)
• VMCB (Virtual Machine state data structure)
• VMCS (Virtual Machine control structure)
• Shadow Page Tables (Isolation of guest OS page tables)
• NPT (Second-level address translation for virtualization)
• EPT (Hardware second-level memory address translation)
• MRAM (Data storage using magnetic states)
• ReRAM (Data storage through cell resistance)
• Flash NAND (Data storage in a transistor floating gate)
• DDR3 (Synchronous dynamic memory with double data rate)
• CXL Memory (PCIe-attached memory expansion with coherency)
• HBM (3D stacked memory with silicon vias)
• GDDR6X (PAM4 encoding with multi-level amplitude modulation)
• VXLAN offload (VXLAN hardware acceleration)
• Virtio-vsock (Guest socket I/O channel)
• DPDK (High speed shared memory access)
• OVS (Programmable multi-layer virtual switch)
• DMA Remapping (Hardware isolation of direct memory access)
• vIOMMU (Translation of DMA request handling for VM)
• Hot-plug Memory (Dynamic addition of RAM without reboot)
• NUMA emulation (Emulating Non-Uniform memory access)